Move VU-Meter to own project
This commit is contained in:
parent
6ad73c21d6
commit
0d9ebbe9ac
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@ -62,44 +62,6 @@ X C/B 8 0 300 200 D 50 20 1 1 I
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ENDDRAW
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ENDDEF
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#
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# Comparator_LM339
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#
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DEF Comparator_LM339 U 0 5 Y Y 5 L N
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F0 "U" 0 200 50 H V L CNN
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F1 "Comparator_LM339" 0 -200 50 H V L CNN
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F2 "" -50 100 50 H I C CNN
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F3 "" 50 200 50 H I C CNN
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ALIAS LMV339
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$FPLIST
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SOIC*3.9x8.7mm*P1.27mm*
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TSSOP*4.4x5mm*P0.65mm*
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$ENDFPLIST
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DRAW
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P 4 1 1 10 -200 200 200 0 -200 -200 -200 200 f
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P 7 1 1 5 130 -20 110 -20 130 0 110 20 90 0 110 -20 90 -20 N
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P 4 2 1 10 -200 200 200 0 -200 -200 -200 200 f
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P 7 2 1 5 130 -20 110 -20 130 0 110 20 90 0 110 -20 90 -20 N
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P 4 3 1 10 -200 200 200 0 -200 -200 -200 200 f
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P 7 3 1 5 130 -20 110 -20 130 0 110 20 90 0 110 -20 90 -20 N
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P 4 4 1 10 -200 200 200 0 -200 -200 -200 200 f
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P 7 4 1 5 130 -20 110 -20 130 0 110 20 90 0 110 -20 90 -20 N
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X ~ 2 300 0 100 L 50 50 1 1 C
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X - 4 -300 -100 100 R 50 50 1 1 I
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X + 5 -300 100 100 R 50 50 1 1 I
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X ~ 1 300 0 100 L 50 50 2 1 C
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X - 6 -300 -100 100 R 50 50 2 1 I
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X + 7 -300 100 100 R 50 50 2 1 I
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X - 10 -300 -100 100 R 50 50 3 1 I
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X + 11 -300 100 100 R 50 50 3 1 I
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X ~ 13 300 0 100 L 50 50 3 1 C
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X ~ 14 300 0 100 L 50 50 4 1 C
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X - 8 -300 -100 100 R 50 50 4 1 I
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X + 9 -300 100 100 R 50 50 4 1 I
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X V- 12 -100 -300 150 U 50 50 5 1 W
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X V+ 3 -100 300 150 D 50 50 5 1 W
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ENDDRAW
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ENDDEF
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#
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# Connector_AudioJack3_Ground
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#
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DEF Connector_AudioJack3_Ground J 0 20 Y Y 1 F N
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@ -250,51 +212,6 @@ X ~ 2 0 -150 110 U 50 50 1 1 P
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ENDDRAW
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ENDDEF
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#
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# Device_D
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#
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DEF Device_D D 0 40 N N 1 F N
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F0 "D" 0 100 50 H V C CNN
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F1 "Device_D" 0 -100 50 H V C CNN
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F2 "" 0 0 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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$FPLIST
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TO-???*
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*_Diode_*
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*SingleDiode*
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D_*
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$ENDFPLIST
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DRAW
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P 2 0 1 10 -50 50 -50 -50 N
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P 2 0 1 0 50 0 -50 0 N
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P 4 0 1 10 50 50 50 -50 -50 0 50 50 N
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X K 1 -150 0 100 R 50 50 1 1 P
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X A 2 150 0 100 L 50 50 1 1 P
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ENDDRAW
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ENDDEF
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#
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# Device_LED
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#
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DEF Device_LED D 0 40 N N 1 F N
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F0 "D" 0 100 50 H V C CNN
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F1 "Device_LED" 0 -100 50 H V C CNN
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F2 "" 0 0 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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$FPLIST
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LED*
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LED_SMD:*
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LED_THT:*
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$ENDFPLIST
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DRAW
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P 2 0 1 10 -50 -50 -50 50 N
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P 2 0 1 0 -50 0 50 0 N
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P 4 0 1 10 50 -50 50 50 -50 0 50 -50 N
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P 5 0 1 0 -120 -30 -180 -90 -150 -90 -180 -90 -180 -60 N
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P 5 0 1 0 -70 -30 -130 -90 -100 -90 -130 -90 -130 -60 N
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X K 1 -150 0 100 R 50 50 1 1 P
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X A 2 150 0 100 L 50 50 1 1 P
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ENDDRAW
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ENDDEF
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#
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# Device_R
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#
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DEF Device_R R 0 0 N Y 1 F N
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File diff suppressed because it is too large
Load diff
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@ -3,7 +3,7 @@ EELAYER 30 0
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EELAYER END
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$Descr A3 16535 11693
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encoding utf-8
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Sheet 1 2
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Sheet 1 1
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Title ""
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Date ""
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Rev "v0.1"
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@ -1659,8 +1659,6 @@ Wire Wire Line
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Connection ~ 14600 1900
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Wire Wire Line
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14600 1800 14600 1900
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Text GLabel 9100 6550 0 50 Input ~ 0
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Mic1
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$Comp
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L Amplifier_Operational:LM358 U1
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U 1 1 60A8F329
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@ -1774,41 +1772,6 @@ Text Notes 6450 1250 0 50 ~ 0
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TODO: On-Air buttons
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Text Notes 8600 650 0 50 ~ 0
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TODO: Rotation direction of potentiometers!\n(counter-clockwise less gain, clockwise more gain)
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$Sheet
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S 9350 6150 1000 550
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U 5FA7BAE6
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F0 "vu_meter" 50
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F1 "vu_meter.sch" 50
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F2 "V_CC" I L 9350 6300 50
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F3 "GND" I R 10350 6550 50
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F4 "Line_Input" I L 9350 6550 50
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$EndSheet
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$Comp
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L power:+15V #PWR037
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U 1 1 5FB63B06
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P 9100 6200
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F 0 "#PWR037" H 9100 6050 50 0001 C CNN
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F 1 "+15V" H 9115 6373 50 0000 C CNN
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F 2 "" H 9100 6200 50 0001 C CNN
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F 3 "" H 9100 6200 50 0001 C CNN
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1 9100 6200
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1 0 0 -1
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$EndComp
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$Comp
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L power:GNDREF #PWR038
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U 1 1 5FB64ECD
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P 10500 6650
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F 0 "#PWR038" H 10500 6400 50 0001 C CNN
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F 1 "GNDREF" H 10505 6477 50 0000 C CNN
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F 2 "" H 10500 6650 50 0001 C CNN
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F 3 "" H 10500 6650 50 0001 C CNN
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1 10500 6650
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1 0 0 -1
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$EndComp
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Wire Wire Line
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10350 6550 10500 6550
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Wire Wire Line
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10500 6550 10500 6650
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$Comp
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L power:GNDREF #PWR036
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U 1 1 5FF79FFE
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@ -1925,8 +1888,6 @@ Wire Wire Line
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4550 9100 6000 9100
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Wire Wire Line
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6000 9100 6000 8850
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Wire Wire Line
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9100 6550 9350 6550
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NoConn ~ 2850 1700
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NoConn ~ 12250 2000
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Wire Wire Line
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@ -1946,10 +1907,6 @@ Connection ~ 4900 10150
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Wire Wire Line
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2650 1700 2650 1100
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Connection ~ 2650 1100
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Wire Wire Line
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9100 6200 9100 6300
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Wire Wire Line
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9100 6300 9350 6300
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Wire Wire Line
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2650 800 2650 950
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Wire Wire Line
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264
schematics/vu_meter/vu_meter-cache.lib
Normal file
264
schematics/vu_meter/vu_meter-cache.lib
Normal file
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@ -0,0 +1,264 @@
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EESchema-LIBRARY Version 2.4
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#encoding utf-8
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#
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# Amplifier_Operational_LM358
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#
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DEF Amplifier_Operational_LM358 U 0 5 Y Y 3 L N
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F0 "U" 0 200 50 H V L CNN
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F1 "Amplifier_Operational_LM358" 0 -200 50 H V L CNN
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F2 "" 0 0 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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ALIAS LM358 AD8620 LMC6062 LMC6082 TL062 TL072 TL082 NE5532 SA5532 RC4558 RC4560 RC4580 LMV358 TS912 TSV912IDT TSV912IST TLC272 TLC277 MCP602 OPA1678 OPA2134 OPA2340 OPA2376xxD OPA2376xxDGK MC33078 MC33178 LM4562 OP249 OP275 ADA4075-2 MCP6002-xP MCP6002-xSN MCP6002-xMS LM7332 OPA2333xxD OPA2333xxDGK LMC6482 LT1492 LTC6081xMS8 LM6172 MCP6L92 NJM2043 NJM2114 NJM4556A NJM4558 NJM4559 NJM4560 NJM4580 NJM5532 ADA4807-2ARM OPA2691 LT6234 OPA2356xxD OPA2356xxDGK OPA1612AxD MC33172 OPA1602 TLV2372 LT6237 OPA2277 MCP6022 MCP6V67EMS
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$FPLIST
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SOIC*3.9x4.9mm*P1.27mm*
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DIP*W7.62mm*
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TO*99*
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OnSemi*Micro8*
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TSSOP*3x3mm*P0.65mm*
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TSSOP*4.4x3mm*P0.65mm*
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MSOP*3x3mm*P0.65mm*
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SSOP*3.9x4.9mm*P0.635mm*
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LFCSP*2x2mm*P0.5mm*
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*SIP*
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SOIC*5.3x6.2mm*P1.27mm*
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$ENDFPLIST
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DRAW
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P 4 1 1 10 -200 200 200 0 -200 -200 -200 200 f
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P 4 2 1 10 -200 200 200 0 -200 -200 -200 200 f
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X ~ 1 300 0 100 L 50 50 1 1 O
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X - 2 -300 -100 100 R 50 50 1 1 I
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X + 3 -300 100 100 R 50 50 1 1 I
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X + 5 -300 100 100 R 50 50 2 1 I
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X - 6 -300 -100 100 R 50 50 2 1 I
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X ~ 7 300 0 100 L 50 50 2 1 O
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X V- 4 -100 -300 150 U 50 50 3 1 W
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X V+ 8 -100 300 150 D 50 50 3 1 W
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ENDDRAW
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ENDDEF
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#
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# Comparator_LM339
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#
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DEF Comparator_LM339 U 0 5 Y Y 5 L N
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F0 "U" 0 200 50 H V L CNN
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F1 "Comparator_LM339" 0 -200 50 H V L CNN
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F2 "" -50 100 50 H I C CNN
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F3 "" 50 200 50 H I C CNN
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ALIAS LMV339
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$FPLIST
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SOIC*3.9x8.7mm*P1.27mm*
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TSSOP*4.4x5mm*P0.65mm*
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$ENDFPLIST
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DRAW
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P 4 1 1 10 -200 200 200 0 -200 -200 -200 200 f
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P 7 1 1 5 130 -20 110 -20 130 0 110 20 90 0 110 -20 90 -20 N
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P 4 2 1 10 -200 200 200 0 -200 -200 -200 200 f
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P 7 2 1 5 130 -20 110 -20 130 0 110 20 90 0 110 -20 90 -20 N
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P 4 3 1 10 -200 200 200 0 -200 -200 -200 200 f
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P 7 3 1 5 130 -20 110 -20 130 0 110 20 90 0 110 -20 90 -20 N
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P 4 4 1 10 -200 200 200 0 -200 -200 -200 200 f
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P 7 4 1 5 130 -20 110 -20 130 0 110 20 90 0 110 -20 90 -20 N
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X ~ 2 300 0 100 L 50 50 1 1 C
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X - 4 -300 -100 100 R 50 50 1 1 I
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X + 5 -300 100 100 R 50 50 1 1 I
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X ~ 1 300 0 100 L 50 50 2 1 C
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X - 6 -300 -100 100 R 50 50 2 1 I
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X + 7 -300 100 100 R 50 50 2 1 I
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X - 10 -300 -100 100 R 50 50 3 1 I
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X + 11 -300 100 100 R 50 50 3 1 I
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X ~ 13 300 0 100 L 50 50 3 1 C
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X ~ 14 300 0 100 L 50 50 4 1 C
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X - 8 -300 -100 100 R 50 50 4 1 I
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X + 9 -300 100 100 R 50 50 4 1 I
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X V- 12 -100 -300 150 U 50 50 5 1 W
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X V+ 3 -100 300 150 D 50 50 5 1 W
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ENDDRAW
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ENDDEF
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#
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# Connector_Conn_01x03_Male
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#
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DEF Connector_Conn_01x03_Male J 0 40 Y N 1 F N
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F0 "J" 0 200 50 H V C CNN
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F1 "Connector_Conn_01x03_Male" 0 -200 50 H V C CNN
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F2 "" 0 0 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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$FPLIST
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Connector*:*_1x??_*
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$ENDFPLIST
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DRAW
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S 34 -95 0 -105 1 1 6 F
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S 34 5 0 -5 1 1 6 F
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S 34 105 0 95 1 1 6 F
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P 2 1 1 6 50 -100 34 -100 N
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P 2 1 1 6 50 0 34 0 N
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P 2 1 1 6 50 100 34 100 N
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X Pin_1 1 200 100 150 L 50 50 1 1 P
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X Pin_2 2 200 0 150 L 50 50 1 1 P
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X Pin_3 3 200 -100 150 L 50 50 1 1 P
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ENDDRAW
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ENDDEF
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#
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# Device_C
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#
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DEF Device_C C 0 10 N Y 1 F N
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F0 "C" 25 100 50 H V L CNN
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F1 "Device_C" 25 -100 50 H V L CNN
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F2 "" 38 -150 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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$FPLIST
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C_*
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$ENDFPLIST
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DRAW
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P 2 0 1 20 -80 -30 80 -30 N
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P 2 0 1 20 -80 30 80 30 N
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X ~ 1 0 150 110 D 50 50 1 1 P
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X ~ 2 0 -150 110 U 50 50 1 1 P
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ENDDRAW
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ENDDEF
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#
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# Device_CP
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#
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DEF Device_CP C 0 10 N Y 1 F N
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F0 "C" 25 100 50 H V L CNN
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F1 "Device_CP" 25 -100 50 H V L CNN
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F2 "" 38 -150 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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$FPLIST
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CP_*
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$ENDFPLIST
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DRAW
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S -90 20 90 40 0 1 0 N
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S 90 -20 -90 -40 0 1 0 F
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P 2 0 1 0 -70 90 -30 90 N
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P 2 0 1 0 -50 110 -50 70 N
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X ~ 1 0 150 110 D 50 50 1 1 P
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X ~ 2 0 -150 110 U 50 50 1 1 P
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ENDDRAW
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ENDDEF
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#
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# Device_D
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#
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DEF Device_D D 0 40 N N 1 F N
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F0 "D" 0 100 50 H V C CNN
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F1 "Device_D" 0 -100 50 H V C CNN
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F2 "" 0 0 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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$FPLIST
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TO-???*
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*_Diode_*
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*SingleDiode*
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D_*
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$ENDFPLIST
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DRAW
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P 2 0 1 10 -50 50 -50 -50 N
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P 2 0 1 0 50 0 -50 0 N
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P 4 0 1 10 50 50 50 -50 -50 0 50 50 N
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X K 1 -150 0 100 R 50 50 1 1 P
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X A 2 150 0 100 L 50 50 1 1 P
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ENDDRAW
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ENDDEF
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#
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# Device_LED
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#
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DEF Device_LED D 0 40 N N 1 F N
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F0 "D" 0 100 50 H V C CNN
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F1 "Device_LED" 0 -100 50 H V C CNN
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F2 "" 0 0 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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$FPLIST
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LED*
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LED_SMD:*
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LED_THT:*
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$ENDFPLIST
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DRAW
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P 2 0 1 10 -50 -50 -50 50 N
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P 2 0 1 0 -50 0 50 0 N
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P 4 0 1 10 50 -50 50 50 -50 0 50 -50 N
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P 5 0 1 0 -120 -30 -180 -90 -150 -90 -180 -90 -180 -60 N
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P 5 0 1 0 -70 -30 -130 -90 -100 -90 -130 -90 -130 -60 N
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X K 1 -150 0 100 R 50 50 1 1 P
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X A 2 150 0 100 L 50 50 1 1 P
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ENDDRAW
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ENDDEF
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#
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# Device_R
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#
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DEF Device_R R 0 0 N Y 1 F N
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F0 "R" 80 0 50 V V C CNN
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F1 "Device_R" 0 0 50 V V C CNN
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F2 "" -70 0 50 V I C CNN
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F3 "" 0 0 50 H I C CNN
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$FPLIST
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R_*
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$ENDFPLIST
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DRAW
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S -40 -100 40 100 0 1 10 N
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X ~ 1 0 150 50 D 50 50 1 1 P
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X ~ 2 0 -150 50 U 50 50 1 1 P
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ENDDRAW
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ENDDEF
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#
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# Device_R_POT
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#
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DEF Device_R_POT RV 0 40 Y N 1 F N
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F0 "RV" -175 0 50 V V C CNN
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F1 "Device_R_POT" -100 0 50 V V C CNN
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F2 "" 0 0 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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$FPLIST
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Potentiometer*
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$ENDFPLIST
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DRAW
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S 40 100 -40 -100 0 1 10 N
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P 2 0 1 0 100 0 60 0 N
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P 4 0 1 0 45 0 90 20 90 -20 45 0 F
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X 1 1 0 150 50 D 50 50 1 1 P
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X 2 2 150 0 50 L 50 50 1 1 P
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X 3 3 0 -150 50 U 50 50 1 1 P
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ENDDRAW
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ENDDEF
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#
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# power_+15V
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#
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DEF power_+15V #PWR 0 0 Y Y 1 F P
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F0 "#PWR" 0 -150 50 H I C CNN
|
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F1 "power_+15V" 0 140 50 H V C CNN
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F2 "" 0 0 50 H I C CNN
|
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F3 "" 0 0 50 H I C CNN
|
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DRAW
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P 2 0 1 0 -30 50 0 100 N
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P 2 0 1 0 0 0 0 100 N
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P 2 0 1 0 0 100 30 50 N
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X +15V 1 0 0 0 U 50 50 1 1 W N
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ENDDRAW
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ENDDEF
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#
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# power_GNDREF
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#
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DEF power_GNDREF #PWR 0 0 Y Y 1 F P
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F0 "#PWR" 0 -250 50 H I C CNN
|
||||
F1 "power_GNDREF" 0 -150 50 H V C CNN
|
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F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
DRAW
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P 2 0 1 0 -25 -75 25 -75 N
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P 2 0 1 0 -5 -100 5 -100 N
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P 2 0 1 0 0 -50 0 0 N
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P 2 0 1 0 50 -50 -50 -50 N
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X GNDREF 1 0 0 0 D 50 50 1 1 W N
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ENDDRAW
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ENDDEF
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#
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# power_PWR_FLAG
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#
|
||||
DEF power_PWR_FLAG #FLG 0 0 N N 1 F P
|
||||
F0 "#FLG" 0 75 50 H I C CNN
|
||||
F1 "power_PWR_FLAG" 0 150 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
DRAW
|
||||
P 6 0 1 0 0 0 0 50 -40 75 0 100 40 75 0 50 N
|
||||
X pwr 1 0 0 0 U 50 50 0 0 w
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
#End Library
|
||||
4172
schematics/vu_meter/vu_meter.kicad_pcb
Normal file
4172
schematics/vu_meter/vu_meter.kicad_pcb
Normal file
File diff suppressed because it is too large
Load diff
261
schematics/vu_meter/vu_meter.pro
Normal file
261
schematics/vu_meter/vu_meter.pro
Normal file
|
|
@ -0,0 +1,261 @@
|
|||
update=Monday, 09 November 2020 at 00:08:23
|
||||
version=1
|
||||
last_client=kicad
|
||||
[general]
|
||||
version=1
|
||||
RootSch=
|
||||
BoardNm=
|
||||
[cvpcb]
|
||||
version=1
|
||||
NetIExt=net
|
||||
[eeschema]
|
||||
version=1
|
||||
LibDir=
|
||||
[eeschema/libraries]
|
||||
[schematic_editor]
|
||||
version=1
|
||||
PageLayoutDescrFile=
|
||||
PlotDirectoryName=
|
||||
SubpartIdSeparator=0
|
||||
SubpartFirstId=65
|
||||
NetFmtName=Pcbnew
|
||||
SpiceAjustPassiveValues=0
|
||||
LabSize=50
|
||||
ERC_TestSimilarLabels=1
|
||||
[pcbnew]
|
||||
version=1
|
||||
PageLayoutDescrFile=
|
||||
LastNetListRead=vu_meter.net
|
||||
CopperLayerCount=2
|
||||
BoardThickness=1.6
|
||||
AllowMicroVias=0
|
||||
AllowBlindVias=0
|
||||
RequireCourtyardDefinitions=0
|
||||
ProhibitOverlappingCourtyards=1
|
||||
MinTrackWidth=0.2
|
||||
MinViaDiameter=0.4
|
||||
MinViaDrill=0.3
|
||||
MinMicroViaDiameter=0.2
|
||||
MinMicroViaDrill=0.09999999999999999
|
||||
MinHoleToHole=0.25
|
||||
TrackWidth1=0.25
|
||||
TrackWidth2=0.25
|
||||
TrackWidth3=1
|
||||
ViaDiameter1=0.6
|
||||
ViaDrill1=0.3
|
||||
dPairWidth1=0.2
|
||||
dPairGap1=0.25
|
||||
dPairViaGap1=0.25
|
||||
SilkLineWidth=0.12
|
||||
SilkTextSizeV=1
|
||||
SilkTextSizeH=1
|
||||
SilkTextSizeThickness=0.15
|
||||
SilkTextItalic=0
|
||||
SilkTextUpright=1
|
||||
CopperLineWidth=0.2
|
||||
CopperTextSizeV=1.5
|
||||
CopperTextSizeH=1.5
|
||||
CopperTextThickness=0.3
|
||||
CopperTextItalic=0
|
||||
CopperTextUpright=1
|
||||
EdgeCutLineWidth=0.05
|
||||
CourtyardLineWidth=0.05
|
||||
OthersLineWidth=0.12
|
||||
OthersTextSizeV=1
|
||||
OthersTextSizeH=1
|
||||
OthersTextSizeThickness=0.15
|
||||
OthersTextItalic=0
|
||||
OthersTextUpright=1
|
||||
SolderMaskClearance=0
|
||||
SolderMaskMinWidth=0
|
||||
SolderPasteClearance=0
|
||||
SolderPasteRatio=-0
|
||||
[pcbnew/Layer.F.Cu]
|
||||
Name=F.Cu
|
||||
Type=0
|
||||
Enabled=1
|
||||
[pcbnew/Layer.In1.Cu]
|
||||
Name=In1.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In2.Cu]
|
||||
Name=In2.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In3.Cu]
|
||||
Name=In3.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In4.Cu]
|
||||
Name=In4.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In5.Cu]
|
||||
Name=In5.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In6.Cu]
|
||||
Name=In6.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In7.Cu]
|
||||
Name=In7.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In8.Cu]
|
||||
Name=In8.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In9.Cu]
|
||||
Name=In9.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In10.Cu]
|
||||
Name=In10.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In11.Cu]
|
||||
Name=In11.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In12.Cu]
|
||||
Name=In12.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In13.Cu]
|
||||
Name=In13.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In14.Cu]
|
||||
Name=In14.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In15.Cu]
|
||||
Name=In15.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In16.Cu]
|
||||
Name=In16.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In17.Cu]
|
||||
Name=In17.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In18.Cu]
|
||||
Name=In18.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In19.Cu]
|
||||
Name=In19.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In20.Cu]
|
||||
Name=In20.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In21.Cu]
|
||||
Name=In21.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In22.Cu]
|
||||
Name=In22.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In23.Cu]
|
||||
Name=In23.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In24.Cu]
|
||||
Name=In24.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In25.Cu]
|
||||
Name=In25.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In26.Cu]
|
||||
Name=In26.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In27.Cu]
|
||||
Name=In27.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In28.Cu]
|
||||
Name=In28.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In29.Cu]
|
||||
Name=In29.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In30.Cu]
|
||||
Name=In30.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.B.Cu]
|
||||
Name=B.Cu
|
||||
Type=0
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Adhes]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Adhes]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Paste]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Paste]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.SilkS]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.SilkS]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Mask]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Mask]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Dwgs.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Cmts.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Eco1.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Eco2.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Edge.Cuts]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Margin]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.CrtYd]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.CrtYd]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Fab]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Fab]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Rescue]
|
||||
Enabled=0
|
||||
[pcbnew/Netclasses]
|
||||
[pcbnew/Netclasses/Default]
|
||||
Name=Default
|
||||
Clearance=0.2
|
||||
TrackWidth=0.25
|
||||
ViaDiameter=0.6
|
||||
ViaDrill=0.3
|
||||
uViaDiameter=0.3
|
||||
uViaDrill=0.1
|
||||
dPairWidth=0.2
|
||||
dPairGap=0.25
|
||||
dPairViaGap=0.25
|
||||
[pcbnew/Netclasses/1]
|
||||
Name=Power
|
||||
Clearance=0.2
|
||||
TrackWidth=1
|
||||
ViaDiameter=0.8
|
||||
ViaDrill=0.6
|
||||
uViaDiameter=0.3
|
||||
uViaDrill=0.1
|
||||
dPairWidth=0.2
|
||||
dPairGap=0.25
|
||||
dPairViaGap=0.25
|
||||
File diff suppressed because it is too large
Load diff
Reference in a new issue